The internal organization of a computer must fulfill the specification of the programming model including the following aspects: Instruction-set architecture (ISA), microarchitecture design, logic design, and implementation. Today’s advanced computing systems are used in several application domains, such as Embedded Systems, Automotive, Cyber-Physical Systems, Industry 4.0, Optics, Teratronic, Supercomputing and Big Data.

There are several scientific challenges imposed to computer architectures today. Apart from performance, security and dependability, there are the “paradigm shift” from single- to multi/many-core technologies, incl. safety, reliability, dependability, dark silicon, low power, and 3D-stacking.  The hardware/software interface defines and translates the capabilities of the underlying hardware. To ease the use of complex and in future semiconductor roadmaps heterogeneous multiple core architectures, the tools and methods are to be automated to hide the complexity of the underlying hardware to the application programmer. One possibility is to apply semi-automated parallelization for multi-/many-core technologies. These scalable architectures are efficiently interconnected by Network-on-Chip solutions. They could also be heterogeneous comprising of various accelerators such as GPU or FPGA cores. Another option is to use domain-specific or situation-/application-aware adaptive architectures that are optimized toward specific requirements. Hardware/Software Codesign of Virtualization Layers becomes more and more important within future computer architecture approaches including rapid as well as virtual prototyping.

 
 Scalable Network-on-Chip Solution
(DFG SFB TRR89)  

Twisted pair based interface board of the
Timing and Fast Control (TMC) prototype
developed at KIT-ITIV

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  • emmtrix Technologies GmbH is a spinoff of the Institute for Information Processing Technologies (Institut für Technik der Informationsverarbeitung - ITIV) at KIT